When designing new chips, different chip manufacturers and designers use different chip design methodologies depending on the need of each moment and therefore what they are looking for in the final design. These methodologies are also what makes a few companies in the sector ahead of the rest.
When we talk about the design of new integrated circuits on a chip, whatever they are, we are already talking about a CPU, a GPU, a chipset, a memory, etc. Three different styles or methodologies are used in terms of design. Which are called Full Custom, Semi Custom and EDA. Let’s see what each of them are like and how they differ between them.
What is the Standard Cell Library?
First of all we have to understand what a Standard Cell Library is. In the same way that programming languages usually have libraries with the most used data structures and algorithms when developing programs. foundries or processor factories have their own standard libraries where in each of them the logic gates that will be used to create a future digital design are well defined.
Each manufacturing node has a standard library of logic gates depending on the node and the utility to be used. For example TSMC has a 7nm node for high performance and another for low power. Each of them has a Standard Cell Library, which will be essential for the creation of new processors. Since it includes everything necessary such as logic gates, flip-flops, latches, etc.
So it is the foundries themselves such as Intel, TSMC, Samsung, GLOBALFOUNDRIES, SMIC and many others in the world that end up developing each of them their Standard Cell Library, which will be adopted for the creation of new chips. Each Standard Cell Library can have several variants of each of the logic gates. Some will stand out for their performance, others for having a smaller area, we will have versions of a logic door with lower energy consumption and also with knowledge.
Full Custom chip design methodologies
The Full Custom methodology is the most complex of all, since it is only adopted by a few companies in the world whose capital for research and development is immense. This methodology also requires many years of development to complete a design. It is based on the combination of using the Standard Cell Library of the chosen node and custom design.
What does it consist of? Suppose we have a logic gate combination that is not built into the Standard Cell Library and whose implementation is essential to your design. Well, companies with Full Custom capability have the ability to expand the Standard Cell Library of the node they are using and create new add-ons for use in their own designs.
Processor design companies typically when they have a very long-term processor planned, the node they will use is not ready and their Standard Cell Library is not available. So these companies design their own logic gates for a more advanced node. This is something that even Fabless like AMD and NVIDIA do to test new architectures. The methodology is that foundries advance their design libraries to them in advance before rolling out the production of the new node.
From them, companies with Full Custom capacity create simple preliminary designs and thus suggest improvements on the future manufacturing node. This is why certain foundries and manufacturers are looking to have partners with more research and development capabilities. The counterpart of this method? Its high cost, not only due to the design of new combinations of logic gates, but also due to the fact that they are designed for the development of processors within three to five years.
Semi Custom Chip Design Methodologies
Semi custom designs are those that use only the Standard Cell Library of a node already available for manufacturing. Therefore, it is a design methodology designed to launch processors in the very short term and does not require high research and development capital. Today more than 80% of chip design companies are semi custom. All designs start as Semi Custom designs, it is when the engineers with the highest knowledge see the ability to make a better processor using their own technology, they go from Semi Custom to Full Custom. But as we have discussed before, this is something that very few companies can afford.
A curious case of Semi Custom design is AMD, which has its own Standard Cell Library using TSMC as the main manufacturer. A company that agrees to the design of a chip with AMD will not only be able to use the technologies already developed from AMD itself, but will also be able to make use of its own Standard Cell Library to create coprocessors such as accelerators and domain-specific processors for its designs. Something that SONY and Microsoft have done for the creation of the main processors of their next-generation consoles.
However, despite its lower price compared to the Full Custom design, this requires that the manufacture of the chips be contracted in the large foundries, which will not accept very small orders. So chip design involves enough capital to pay for chip manufacturing.
Deployment in FPGAs and CPLDs
The use of FPGAs has become popular in recent years as well as CPLDs, both are programmable logic whose operation and differences between each one we are not going to explain here. Its use in the design methodologies of new processors occurs in two cases. The first for prototyping, the second occurs because there are times when a company does not have the economic capacity to contract a large volume of chips, which is not in the interest of foundries.
It must be taken into account that the deployment in each manufacturing node is increasingly expensive to implement, so large foundries look for the most economically powerful customers. You can design the best GPU in the world that if you do not have the capital of NVIDIA or AMD to hire a large volume of chips then your design will not see the light.
Due to this situation, many chip design companies do not manufacture them, but sell their designs to be implemented in an FPGA or a CPLD that they implement directly in their products. The FPGA ends up becoming the chip that should have been mass produced. In return, there is no need to pay for mass manufacturing and implementation is done in no time.
The problem with FPGAs in particular is that the cost per chip is obviously higher and these are solutions that will be very expensive, but that are designed for very specific customers. Who have the money to pay for said solution, but not the time to wait for a solution.